Semiconductor die are routinely connected to substrates and/or enclosed in semiconductor packages in order to electrically connect the semiconductor die to other system components. For example, commonly-used die attach methods include soldering the die to the substrate or to a package flange, connecting the die to the substrate or flange using a conductive or non-conductive adhesive, and performing eutectic die attach between the die and a metallic surface of the substrate or flange.
Some semiconductor die include conductive through substrate vias (TSVs), which provide electrical pathways between the bottom surface of the die and electrical components formed within or attached to a top surface of the die. Ends of the TSVs that are exposed at the bottom surface of the die may be physically and electrically coupled to conductive features on the top surface of the substrate and/or flange. This enables electrical signals and voltage references (e.g., ground references) to be provided at the interface between the bottom surface of the die and the top surface of the substrate or package flange.
As technology advances, an industry trend is to fabricate thinner and thinner semiconductor die. Although thinner die have a variety of benefits over their thicker counterparts, they also have a tendency to be weaker and more prone to cracking while performing various semiconductor fabrication processes. For example, high thermal and/or physical stresses, which may result in die cracking, may be imparted on a die while singulating the die from a wafer, during pick-and-place operations, and while performing the die attach process to a substrate or package flange. This problem is exacerbated by the inclusion of TSVs in the die, and also by microscopic flaws in the die bottom surface introduced during the wafer thinning process. Prolific die cracking can significantly reduce yields, detrimentally alter the performance of electrical components formed within the die, and increase the incidence of premature device failures in the field.
Accordingly, semiconductor device process engineers and device designers strive to develop stronger thin-die structures and fabrication methods that reduce the incidence of cracking in semiconductor die, and particularly in semiconductor die that include TSVs.